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email: larry@nospam-wagnercode.com (Please
remove "nospam-" from the above address to send me email.) |
LARRY WAGNER - SUMMARY OF
CAPABILITIES
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DSP Algorithm Design: Audio,
Video, Spread Spectrum, CDMA, Software Defined Radio
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Systems Engineering:
Hardware and Software Design
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Communications: Source
Coding for Audio and Video, Modulation, Channel Coding, Turbo Codes
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Internet Broadband Access
Technologies: DSP Algorithms for Cable Modem, DSL and Wireless
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Client/Server (Internet)
Apps: Socket and Driver Software Development, TCP/IP Internals
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ASIC and FPGA Engineering:
Chip Design in Verilog and VHDL, Hardware/Software Codesign
Company Experience
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Atari
- Video Games
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Votan
- Speech Recognition and Speech Coding
· VLSI Technology Inc. - DSP Chip Design
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Talknology
- Voice Personal Digital Assistant
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Intel
- DSP Consultant for audio, video, telephony, communications, and multimedia
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Yamaha
- Consultant for Audio and ISDN
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PC/TVnet - Always
Connected Internet Access using analog or digital TV
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Wagner
DSP Technologies - Multimedia and Communications
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Fuze3 Technologies - Convergent Media,
Radio/TV and Internet, Media Interactive Toys
Patents
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TITLE (with HYPERLINK) |
ASSIGNEE |
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Hybrid multichannel data transmission system utilizing a broadcast medium |
Wagner DSP Technologies |
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Filtering audio signals from a combined microphone/speaker earpiece |
Intel |
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Intel |
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Intel |
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Intel |
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Intel |
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VLSI Technology |
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VLSI Technology |
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VLSI Technology |
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VLSI Technology |
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VLSI Technology |
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Method and apparatus for speech recognition and reproduction |
Votan |
RESUME FOR LARRY WAGNER
2004 - PRESENT WAGNER DSP
TECHNOLOGIES
Consultant on DSP,
Communications and SDR. Algorithm, software, and chip design.
Recently completed
development of a new modulation/coding technology based on CDMA Spread Spectrum
and nonbinary codes. This technology provides for a 1-3 dB improvement over
existing (uncoded) modulation such as BPSK/QPSK. Combined with a low
complexity, low delay channel code this system closes the gap on the Shannon
capacity. It is an alternative to the high complexity, long delay Turbo Codes;
and is compatible with low complexity, short delay Block Turbo Codes and LDPC
Codes. Applications include all forms of digital communications such as 3G/4G
cellular networks, wireless networks (PAN, LAN, MAN, WAN), cable modems, DSL,
and satellite communications. Also of interest is use of this technology for 10
Gigabit Ethernet over copper and 10 Gigabit Backplanes. This technology is now
available for license.
Projects current and past:
- Range extension
techniques for a GPS/LMR system using spreading codes
- Software Defined Radio
(SDR) prototype for public safety radio interoperability
- Co-inventor for an
RF/IF sampling downconversion mixer in CMOS for a frequency agile,
multi-band, multi-mode SDR system with applications in all forms of
wireless devices, especially low power/low cost mobile terminals
(cellphones); there is a pending patent on this technology
- study of mesh networks
using 802.11
- study of MAC/PHY
modifications for 802.11 for range extension; primarily use of the non
standard modulation/coding from the above described Shannon capacity
invention
2000 - 2003 FUZE3 TECHNOLOGIES
Co-founder and Chief
Technical Officer for this emerging technology company, Fuze3 Technologies. Inventor of the business
concept and technology for data embedded in audio. The concept involves
convergence of radio, TV with the Internet; as well as non Internet
applications for Media Interactive Toys and Learning Devices. This is
accomplished by the data communications channel embedded within the audio of
the media (live radio/TV broadcast or media playback from DVD) which is used
either to link the PC to a coordinated web site based on the radio/TV program
or provide commands to control media interactive toys and learning devices. The
technology involves DSP algorithms from audio watermarking, acoustics, spread
spectrum, and code division multiple access. It is called Code Division Shift
Keying, see CDSK for more details.
There are 9 patents pending.
Below is the front end
design flow and tools for the FuzeLink
MicroDecoder Processor 
Mixed Signal ASIC:
- Algorithm design in
MathCad and MATLAB
- Proof of concept
prototype using TI C5000 DSP, Code Composer IDE; this ran real time but
with limited number of matched filters
- Prototype for ASIC
using A/D, D/A converter chip plus C5000 DSP and a Xilinx Virtex II FPGA
- Mixed signal ASIC
designed using variation of Verilog in FPGA plus Verilog of the DSP code
- Test Vectors for ASIC
done with integer version of the MATLAB model
- Both Xilinx ISE and
ModelSim used for simulation
- Both Xilinx ISE and
Synplicity used for FPGA synthesis; Synopsys for ASIC synthesis
1995 - 1999 WAGNER DSP
TECHNOLOGIES
Developed a novel Internet
access system TVnet for
PC/TVnet, Inc. which includes a new invention that provides constant email and
an always connected web portal. This technology is based on Cable Television
and TV Broadcast systems already in place; and allows the user to receive
Internet data without a return channel data path. A patent Hybrid
multichannel data transmission system utilizing a broadcast medium has
been issued for this technology and prototype development is in progress.
Consulting project at
Eclipse involved Verilog chip design for WinCE I/O devices.
Consulting activities at
Yamaha for PC multimedia products: Audio, Graphics, ISDN Communications as Win
95, Plug and Play, add-in cards. Involved in chip design, board design and all
layers of software for these products. Other software projects for NSP, Native
Audio, Direct-X, SPOX, and VxD development.
Involved in latest Audio and
Video Compression and Modulation/Broadcast standards, i.e. coder algorithms
MPEG, Dolby AC3, G.7xx, and modems for DTV Grand Alliance VSB, DVB, QAM, FEC.
Consulting projects on DSL,
ADSL, VDSL, xDSL, datapump digital signal processing including
modulation/demodulation and FEC, AFE tradeoffs.
1991 - 1994 CONSULTANT
TO INTEL
Consulted on: audio,
telephony, speech recognition, speech compression (coding), text to speech
synthesis, and other speech technologies (verification, identification, word
spotting). Member of ADL PC Audio Team which defined a family of DSP based audio/telephony products.
Participated in selection of DSP chip (TI TMS320C31) and operating system
(SPOX) as well as DSP s/w development environment and algorithm suppliers.
Helped in selection and management of technology partners who participated in
the design of this product.
Managed the development of
DSP software for FAX/MODEM and designed the CallerID control section and
algorithm.
Ported a UNIX based
implementation of the GSM Speech Coder to the X86, and then to the C31 DSP.
Developed a new technology, Code over Voice, a technique to combine voice and
data in the analog domain which allows audio/data conferencing to take place
using a single telephone line. This resulted in Intel filing for a Patent Application on January 4, 1993.
Started effort on acoustic
echo removal algorithms for headsets and speakerphone applications. Developed
the half duplex echo suppressor speakerphone used in the ProShare Video
Conferencing product and initiated the design of a headset full duplex echo
canceller. Technical liaison with Plantronics, the headset provider, where
activities to improve the audio quality of the non direct speaking microphone
when used with a speech coder; this resulted in the design of a spectral
shaping filter that improved the audio quality along with the filing of a
Patent Application. Also the speakerphone design resulted in Intel filing for 3
Patent Applications (Use of Continuous State Variable to Control the Voice
Switching, Histogram for Audio Signals, and Distributed Processing of Audio
Signals). Member of design team for a DSVD (Digital Simultaneous Voice Data)
modem.
1990 - 1991 WAGNER
DSP TECHNOLOGIES
Founder of Wagner DSP
Technologies. Inventor of MetaCoding(TM), a data compression technology based
on the DCT and another transform which will significantly reduce the digital
bit rate of audio and video signals, thereby providing for greater efficiency
in transmission or storage. This technology is now available for license.
Capabilities include design
expertise in both hardware and software. Able to take a product concept and
perform algorithm and mathematical research, systems architecture, logic
design, circuit design for a VLSI chip and/or a printed circuit board, and
write the programs for the processor(s). Extremely well versed in the most
modern of ASIC high level VLSI design methodologies such as compilers and
megacells. Has been programming computers for over 35 years, using almost every
high level language and many assembly languages.
1988 - 1989 TALKNOLOGY
Co-founder and Chief
Technical Officer of this start-up which was developing a working prototype for
a new product category along with the voice technology of recognition and
compression to support it. The product, code named the TALKMAN, is a hand-held
solid state voice recorder with novel voice activated features that allow it to
perform the functions of an organizer, databank, digital dictation, voice and
telephone integration with the desktop personal computer, and a
personal/portable voice mail system.
1982 - 1987 VLSI TECHNOLOGY
INC.
Performed algorithm research
for a novel Digital Signal Processor chip based on a logarithmic number system.
Designed the arithmetic section and supervised 3 other engineers who designed
other sections of the chip. The innovation in this design was an associative
memory that performed a very efficient table look up for several mathematical
functions. 4 patents have been issued from this effort. Proposed and won a
contract for a DSP single chip 9600 bps FAX modem. Engineering manager for this
project which involved: chip design, software design, development system
design, and a cooperative R&D effort with U.C. Berkeley for oversampled A/D
and D/A converters. At one period of this project there were 25 people working
in the above 4 areas. The DSP chip had enough functionality in the first
silicon to run the modem code. It has 120,000 transistors and operates at 10
Mhz with a complete 16 bit multiply accumulate every cycle.
1979 - 1982 VOTAN
Co-founder and inventor of
cost efficient algorithm, mathematics, hardware, and software for digital
signal processing and other computations required for a family of products in
areas of speech coding and speech recognition. As the original employee
performed research, development, and engineering first using an Apple II
computer to simulate the algorithms, then developing a multiprocessor 6502
system, and finally a 2901 board which was the electronics of the product in
1982. Subsequent engineering at Votan has transported this technology to a TI
TMS320C10 DSP chip, a full custom pattern match chip, and a semi-custom
(standard cell) chip for the current PC plug in card.
1976 - 1979 ATARI
Software & systems
architecture member of a 3 man team on initial design of the microprocessor
(6500) based video game. The other two areas represented were MOS/LSI design
and logic design. Interviewed, hired, and supervised 10 engineer/programmers
responsible for the ROM plug in cartridges used in the video game up to 1979.
This effort was for the consumer product called the VCS 2600 which sold
15,000,000 units, 70,000,000 cartridges, and generated $3,000,000,000 in
revenues during the short and explosive product life.
Started an advanced R &
D laboratory to investigate algorithms, artificial intelligence applications, robotics,
and digital signal processing. Developed another cartridge for the video game
which plays chess. It had the top rating when compared (in 1980) with all other
microcomputer systems, some with costs up to $5000. The memory requirements for
this chess program were 6K of ROM and 128 bytes of RAM running on a 1.3Mhz
6502.
1971 - 1976 SINGER
BUSINESS MACHINES
Project manager of a group
of programmers responsible for the code of a microcomputer based intelligent
Point of Sale terminal. Systems architecture for the POS terminal; including
priority interrupt structure, I/O interfaces, address mapping and decoding,
memory and CPU cycle timing, synchronous and asynchronous communications and
queuing theoretic analysis of bus traffic. Participated in the architecture and
design of an NMOS CPU chip, an 8 bit microprocessor similar to the 8080.
Responsible for the microprogrammed control section of the CPU chip. Wrote
assembler and optimizer for an earlier generation microcomputer.
1964 - 1970 PHYSICS
INTERNATIONAL
Worked in mathematics,
especially numerical analysis on computational physics projects. Systems
programmer for several generations of IBM computers (704/709/7090/7094 and
360/370). Setup and managed the scientific computer center.
1959 - 1964 UNIVERSITY
OF CALIFORNIA AT BERKELEY
Graduate and undergraduate
study in Mathematics and Computer Science. Summer jobs in programming at
Stanford Research Institute, Lockheed, Philco-WDL. Part time work as programmer
for the Engineering department, the Psychology department, and the Business
School all at U.C. Berkeley. Spent one year (1962) at U.S. Naval Postgraduate
School in Monterey teaching calculus and computer techniques; and was a
research assistant for projects in the mathematics department working on
problems in lattice theory and probability theory.
OTHER ACTIVITIES
Single Parent: Involved in
school, music, sports and other activities for my 17 year old son
Sports: Tennis, Racquetball,
Skiing, Soccer
REFERENCES AVAILABLE ON REQUEST